The present invention relates to a communication processing device such as a switcher for switching fixed-length packets or a multiplexing device, and in particular to the communication processing device which is capable of supporting an ATM (Asynchronous Transfer Mode) indicated in the CCITT recommendation I.121.
Such a digital communication network designed to support the switching of fixed-length packets includes a transmission-line I/O interface, which may be defined so that a cell with a length c (=a+b) consisting of a header field of an a-byte length and an information field of a b-type length is located on a pay load of a transmission frame consisting of an overhead part having a velocity of V.sub.OH (bytes/sec) and a pay load part having a velocity of V.sub.P (bytes/sec).
For example, the switcher serves to switch only each cell portion of the interface and the multiplexing device also serves to multiplex only each cell portion.
If the communication processing device has the foregoing I/O interface, it mainly treats only each cell portion.
In this instance, therefore, the communication processing device generally has the main function of:
(1) Switching a rate for picking up only a pay load portion from the transmission frame and treating each cell as a train of successive cells, or PA1 (2) Entering the I/O interface format to a switch, controlling the action and stop of the switch portion for treating a transmission overhead portion, discontinuously picking up cell portions only by discontinuously operating the switch, and treating them. PA1 an inner cell train (g cell/sec) consisting of f bytes containing a b-byte information field (where f.times.g=h.times.V, h is an integer or a fraction of an integer), and PA1 treats each inner cell.
The foregoing prior art employing the function (1) requires a plurality of clock generation sources since it operates on respective rate sequences for the internal portion and the I/O portion of the switching device. It results in disadvantageously raising the cost.
The foregoing prior art employing the function (2) also has a disadvantage that a complicated control system is required for controlling the action and stop of the switch and matching the phase of an input interface to another.
In particular, in several places such as the CCITT, the ATM has been under study as a transfer system realizing a wide-band ISDN. The communication processing device such as the switcher designed to support the ATM (referred to as an ATM switcher) or the multiplexing device, in general, includes an I/O interface of a transmission line, which may be defined so that a cell with a length c (=a+b) consisting of a header field of an a-byte length and an information field of a b-type length is located on a pay load of a transmission frame consisting of an overhead part having a velocity of V.sub.OH (bytes/sec) and the pay load part having a velocity of V.sub.P (bytes/sec), as indicated in FIG. 7/I.121(C) of the reference document I.121. The communication processing device supporting the ATM, hence, has the foregoing problems.